\documentstyle[11pt]{report}
\pagestyle{empty}
\begin{document}
\begin{centering}
{\Large {\bf Unibus Cycles\\}}
\vspace{12mm}
{\bf DATO (write) Cycle\\}
\end{centering}
\begin{enumerate}
\item Master asserts BBSY
\item Master asserts Address, and Control Lines
\item Each device decodes address, One slave device is selected
\item Master asserts Data
\item Wait 150ns, and master asserts MSYN
\item Selected slave gets data, and asserts SSYN
\item Master receivs SSYN, removes MSYN and Data
\item Master waits 75ns, removes address and control
\item Slave, having noticed loss of MSYN, removes SSYN
\end{enumerate}
\begin{centering}
\vspace{12mm}
{\bf DATI (Read) Cycle\\}
\end{centering}
\begin{enumerate}
\item Master asserts BBSY
\item Master asserts address and control lines. One slave is selected
\item Master wait 150 ns, and then asserts MSYN
\item Selected slave outputs data
\item Selected slave asserts SSYN
\item Master gets SSYN
\item Master strobes in data
\item Master removes MSYN
\item After 75ns, master removes address and control lines.
\item Slave, having lost MSYN, removes data and SSYN
\end{enumerate}
\clearpage
\begin{centering}
{\Large \bf PDP11 Operands}
\end{centering}
\vspace{12mm}
\begin{verbatim}
|Mode|Reg |
  3    3
 bits bits
\end{verbatim}
\begin{tabbing}
\=\hspace{0.5in}\=\hspace{2in}\=\\
\>Mode\>Name\>Comments\\
\>0\>Register\>Register contains operand\\
\>1\>Register Deferred\>Register contains address of operand\\
\>2\>Autoinc\>Register contains address, then inc register\\
\>3\>Autoinc Def\>Register contains address of address\\
\>\>\>of operand, then inc register\\
\>4\>Autodec\>Dec register, then register contains address of operand\\
\>5\>Autodec Def\>Dec register, then register contains address\\
\>\>\> of address of operand\\
\>6\>Index\>Add next word to register. Register then contains\\
\>\>\>address of operand\\
\>7\>Index Def\>Add next word to register. Register then contains\\
\>\>\>address of address of operand\\
\\
\\
\\
\>Register\\
\>0-5\>General-Purpose Registers\\
\>6\>Hardware Stack Pointer\\
\>7\>Program Counter\\
\end{tabbing}
\clearpage
\begin{centering}
{\Large \bf Some Simple Programs}
\vspace{0.5in}
\end{centering}
\begin{tabbing}
\=\hspace{0.5in}\=\hspace{1in}\=\\
\>1000\>000137\>JMP .\\
\>1002\>001000\\
\end{tabbing}
\vspace{0.5in}
\begin{tabbing}
\=\hspace{0.5in}\=\hspace{1in}\=\\
\>400\>012700\>MOV \#4,R0\\
\>402\>000004\\
\>404\>012702\>MOV \#6,R2\\
\>406\>000006\\
\>410\>060002\>ADD R0,R2\\
\>412\>000000\>HALT\\
\end{tabbing}
\clearpage
\begin{centering}
{\Large \bf CPU Organisation\\}
\vspace{12mm}
{\bf Data Path\\}
\end{centering}
\begin{itemize}
\item Data Manipulation Section
\item More visible (than control) to a programmer
\item Contains Registers, ALU, data multiplexers (switches), etc
\item In general, contains repeated units, so simple in concept
\end{itemize}
\begin{centering}
{\bf Control\\}
\end{centering}
\begin{itemize}
\item Sequences operations in the data path
\item Decodes user program instructions, but is not visible to the
programmer
\item May contain an internal `program' (the microcode)
\item More complex (and interesting) section
\end{itemize}
\end{document}

